SAE J1752-3 is the part of the SAE integrated circuit measurement series that defines the surface scan method for measuring the radiated emissions of an integrated circuit, and it addresses a problem that the conventional product level tests handle poorly. The emission of a finished product is influenced by the board layout, the enclosure and the cabling as much as by the devices on it, so a chip that performs badly in one design may pass in another, which makes it difficult to compare devices and to hold a supplier responsible for an emission problem. The method therefore brings a small loop probe close to the surface of the device and maps the field it produces at each position, recording both the magnitude and, from the phase, the direction of the current responsible. The result is a fingerprint of the device that can be compared between suppliers and between revisions, and it allows the dominant emitting structures within the die and the package to be identified. It is used in device selection and in failure analysis.